Computer systems operate primarily by using microprocessors, also known as integrated circuits (IC), which typically include a central processing unit (CPU) and internal memory. The ICs analyze data to obtain a desired output. The data analysis is governed and determined by certain commands and directives from programs, or software, residing on the computer's memory, which may be stored on hard disks or memory chips, known as random access memory (RAM).
Processors function on a clock cycle, one operation is performed per unit of time, for example, one per millisecond. Every function is executed with a specific size of data, called a word, determined by the size of the chip's data path, or bus, and its physical design, or architecture. For example, a 56-bit chip has 56-bit wide data path. Data is transferred 56-bits at a time, and therefore, a word on a data path on the chip is 56-bits wide. This is referred to as a 56-bit architecture. Other chips can have processors of other sizes. In heterogeneous computer systems there may be processors of more than one word size, which can be problematic in many areas, including especially areas where there may be both sized words used for the same thing or on the same data paths.
Although many of the problems in such heterogeneous systems have been worked around, when a plurality of word sizes are used in the same memory systems, many problems can result. One of the key areas is in cache memory where each of the types of heterogeneously architected processors have access to the same permanent data stores or to the same main memory system. When a “wrong sized word” shows up in the cache of a processor, something must be done.
Many of the tasks performed by the processor are done repeatedly using the same instructions and/or the same data over and over. Accessing this same data and instructions repeatedly at a main memory or worse at permanent data stores is a waste of time and energy. To avoid such pitfalls, specialized memory subsystems such as cache memory were designed, and these are important to the efficient operation of nearly all processors today.
Cache is a special high-speed storage mechanism. A memory cache, sometimes called a cache store or RAM cache, is a portion of memory made of high-speed static RAM (SRAM) instead of the slower and cheaper dynamic RAM (DRAM) used for main memory. Data and instructions repeatedly accessed are stored in the faster SRAM to avoid accessing the slower DRAM, or the even slower hard disk.
Memory caches are also built into the microprocessor architecture between the CPU and DRAM. There may be more than one type of cache on a processor chip, each distinguished by its position relative to the processor. For example, a level 1 (L1) cache is closer to the processor than a level 2 (L2) cache.
As an example of the benefits provided by a memory cache, consider a 512 KB level 2 cache, caching 64 MB of system memory. In general, such a configuration may supply information that the processor requests 90-95% of the time, depending on the application and other factors. That is less than 1% (512 KB L2 cache) of the cached memory (the 64 MB of system memory) used to provide at least 90% of processor requests.
Thus, it is clear that caching will be used in such systems and that there is a need to handle calls by the heterogeneous processors to a memory system (main or long term storage, particularly) when such memory systems handle more than one word type with more than one word length so that the processors will not corrupt data in areas of memory where other types of processors using different length words may have stored data.
We apply the teachings of this invention to our computer systems design to support A-series architecture which has a 56 bit word, which is used in systems with Intel architected systems using a 32 and 64 bit word as well as OS2200 computer system processors which use a 40 bit word.
Many other problems can also be solved by having a mechanism that allows a processor to use a cache for words of more than one length in a computer system having more than one type of processor using words of different lengths.